Chip design, particularly building Custom Application Specific Integrated Circuits (ASICs), normally costs more than $100 million and takes roughly three years to move from concept to production. But Zero ASIC is automating chip design using a no-code approach.
The company has revealed it will begin offering customers early access to its ChipMaker platform, which it claims can quickly assemble customized multi-chiplet system-in-package (SiP) units without the manufacturing burdens traditionally incurred.
Zero ASIC wants to democratize access chip production and make it more viable so companies by offering them a simplified chiplet-based design process. This means customers can build, test, and tweak their designs before ordering devices, with cloud-based Field Programmable Gate Arrays (FPGAs) letting them implement RTL source code.
Building a chip, one eBrick at a time
“To build the next wave of world changing silicon devices, we need to reduce the barrier to ASICs by orders of magnitude,” said CEO and founder of Zero ASIC, Andreas Ologsson. “Our mission at Zero ASIC is to make ordering an ASIC as easy as ordering catalog parts from an electronics distributor.”
The process will rely on a grid-like 3D interposer called eFabric that improves the efficiency of die-to-die communication, as well as composability. It also supports the integration of processing blocks using 3D attached eBrick chiplets.
The eBricks include a quad-core RISC-V Linux-capable dual-issue processor, 5 K LUT embedded FPGA, and 3MB SRAM -3 TOPS machine learning accelerator.
These are pre-made designs that are open to all that can be assembled using the service into a finished SiP. Companies who design their own chips will then submit these to be physically manufactured.
The firm says using its service will lead to savings in cost and energy of between ten and 100 times, especially when you compare it to the process needed to make the best processors out there today.
The firm says the chips designed using this process would be suited for a variety of industries and use cases including those facing supply chain and sustainability challenges. The firm cites robotics, automotive safety, aeropsace, and defense as well as 5G and 6G communications among the appropriate uses for these chips.
Because, however, they won’t sampled until at least the third quarter of 2024, the likes of Nvidia and Intel needn’t yet worry about Zero ASIC’s produce eating into their market share.
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